Method for enabling scan of defective ram prior to repair

Details Method for enabling scan of defective ram prior to repair Method for enabling scan of defective ram prior to repair

2007-09-04

2007-09-04

Ton, David (Department: 2117)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Replacement of memory spare location, portion, or segment

C714S718000, C714S726000, C714S733000, C365S201000

Reexamination Certificate

active

11180416

ABSTRACT:
A semiconductor memory circuit enabling replacement of defective memory elements and associated circuitry with non-defective spare elements of the RAM and associated circuitry, is scanned to enable replacement of a defective RAM element prior to repair of the RAM. A set of set/reset latches are coupled to receive the signal from the memory elements, and a multiplexer control circuit coupled to receive a shift signal and a ram_inhibit signal from a multiplexer to provide specific input signals to the multiplexer components. When a scan operation begins an active clock signal sets a set/reset latch to ram_inhibit mode and this blocks the memory elements from influencing the state of memory output latches, whereby when an memory operation begins, an active clocking signal will reset the set/reset latch into system mode to cause the multiplexers pass appropriate signals from the memory elements to the output latches, and the spare memory element is activated to replace a defective memory element.

REFERENCES:
patent: 6333878 (2001-12-01), Ooishi
patent: 6366508 (2002-04-01), Agrawal et al.
patent: 6496427 (2002-12-01), Kojima et al.
patent: 6505313 (2003-01-01), Phan et al.
patent: 6507524 (2003-01-01), Agrawal et al.

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