Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified configuration
Reexamination Certificate
2007-07-31
2007-07-31
Toledo, Fernando L. (Department: 2823)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Of specified configuration
C257S642000, C257S758000
Reexamination Certificate
active
11056758
ABSTRACT:
A method of forming a via in a low-k dielectric material and without the attendant via poisoning problem, or a dual damascene structure formed in the same dielectric and without the same problem are disclosed. The vertical walls of the via opening are first lined with a low-k protection layer and then covered with a barrier layer in order to prevent outgassing from the low-k dielectric material when copper is deposited into the via opening. In the case of a dual damascene structure, it is sufficient that the hole opening underlying the trench opening is first lined with the low-k protection layer. The resulting via or dual damascene structure is free of poisoned metal and, therefore, more reliable.
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Lin Jing-Cheng
Shue Shau-Lin
Tsai Ming-Hsing
Yu Chen-Hua
Haynes and Boone LLP
Taiwan Semiconductor Manufacturing Company , Ltd.
Toledo Fernando L.
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