Cache lock mechanism with speculative allocation

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories

Reexamination Certificate

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Details

C711S133000, C711S154000

Reexamination Certificate

active

11215684

ABSTRACT:
A method and apparatus to speculatively allocate a combinable store request buffer for a cache lock operation by setting an extended lock indicator. The store request buffer is speculatively allocated and the load-lock micro-operation associated with the cache lock operation is sent to a replay loop. During the replay window, conflict detection processing is completed. When the load-lock micro-operation returns from replay, the store buffer is de-allocated if a conflict has been detected during the replay window.

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patent: 5796977 (1998-08-01), Sarangdhar et al.
patent: 5844569 (1998-12-01), Eisler et al.
patent: 6105119 (2000-08-01), Kerr et al.
patent: 6289343 (2001-09-01), Freund et al.

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