Chip protection register lock circuit in a flash memory device

Details Chip protection register lock circuit in a flash memory device Chip protection register lock circuit in a flash memory device

2007-09-18

2007-09-18

Nguyen, Hiep T. (Department: 2187)

Electrical computers and digital processing systems: memory

Storage accessing and control

Control technique

Reexamination Certificate

active

11583675

ABSTRACT:
A chip protection register lock circuit uses a plurality of lock bits in a lock bit register. If the register contains N bits, N/2 bits of the register are coupled to an erase circuit and the remaining N/2 bits are coupled to a programming circuit. After the chip protection register is programmed, the group of N/2 bits coupled to the erase circuit are erased and the remaining N/2 bits are programmed such that an alternating pattern of logical ones and zeros are in the lock bit register. A read and compare circuit generates a lock indication if the alternating pattern is present.

REFERENCES:
patent: 5594686 (1997-01-01), Hazen
patent: 6031757 (2000-02-01), Chuang
patent: 6643751 (2003-11-01), Rosenquist
patent: 7143255 (2006-11-01), De Santis et al.

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