Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2007-03-27
2007-03-27
Pham, Thanhha (Department: 2813)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S399000
Reexamination Certificate
active
10714001
ABSTRACT:
A method of forming a bit line contact via. The method includes providing a substrate having a transistor with a gate electrode, drain region, and source region, forming a conductive layer overlying the drain region, conformally forming an insulating barrier layer overlying the substrate, blanketly forming a dielectric layer overlying the insulating barrier layer, and forming a via through the dielectric layer and insulating barrier layer, exposing the conductive layer.
REFERENCES:
patent: 6399438 (2002-06-01), Saito et al.
patent: 6458651 (2002-10-01), Rhodes
patent: 6664642 (2003-12-01), Koubuchi et al.
patent: 6690053 (2004-02-01), Amo et al.
patent: 6815752 (2004-11-01), Kitamura
Chen Yi-Nan
Mao Hui-Min
Tsai Tzu-Ching
Nanya Technology Corporation
Pham Thanhha
Quintero Law Office
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