Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2007-03-27
2007-03-27
Doan, Theresa T. (Department: 2814)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S289000
Reexamination Certificate
active
11030432
ABSTRACT:
The invention provides a semiconductor device exhibiting a stable and high breakdown voltage, which is manufactured at a low manufacturing cost. The semiconductor device of the invention includes an n-type silicon substrate; a p-type base region in the surface portion of substrate; an n-type drain region in the surface portion of n-type substrate; a p-type offset region in the surface portion of n-type substrate; an n-type source region in the surface portion of p-type base region; a p-type contact region in the surface portion of p-type base region; a gate electrode above the extended portion of p-type base region extending between n-type source region and n-type substrate (or p-type offset region), with a gate insulation film interposed therebetween; an insulation film on gate electrode and p-type offset region; a source electrode on n-type source region; and a drain electrode on n-type drain region. The p-type offset region is formed of a first p-type sub-region, a second p-type sub-region, and a third p-type sub-region.
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Fujishima Naoto
Kitamura Akio
Matsuzaki Kazuo
Saito Masaru
Tada Gen
Doan Theresa T.
Fuji Electric & Co., Ltd.
Rossi Kimms & McDowell LLP
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