Method of manufacturing an intralevel decoupling capacitor

Details Method of manufacturing an intralevel decoupling capacitor Method of manufacturing an intralevel decoupling capacitor

Filed on

2007-03-27

Date issued

2007-03-27

Examiner

Pham, Hoai (Department: 2814)

Patent Class

Semiconductor device manufacturing: process

SubClass

Making field effect device having pair of active regions...

SubSubClass

Having insulated gate

Other Related Categories

C438S240000

Type

Reexamination Certificate

Status

active

Patent number

11066738

Description

ABSTRACT:
A decoupling capacitor is provided for a semiconductor device and may include a first low dielectric insulator layer and a low resistance conductor formed into at least two interdigitized patterns on the surface of the first low dielectric insulator in a single interconnect plane. A high dielectric constant material may be provided between the two patterns. A circuit for testing a plurality of these capacitors is also provided which includes a charge monitoring circuit, a coupling circuit and a control circuit.

REFERENCES:
patent: 3268809 (1966-08-01), Meyer, et al.
patent: 3287635 (1966-11-01), Mole
patent: 3414792 (1968-12-01), Mui, et al.
patent: 3764938 (1973-10-01), Barnes
patent: 3805198 (1974-04-01), Gewartowski et al.
patent: 3962713 (1976-06-01), Kendall et al.
patent: 4063160 (1977-12-01), Lanz et al.
patent: 4063162 (1977-12-01), Lanz et al.
patent: 4063165 (1977-12-01), Lanz
patent: 4166257 (1979-08-01), Subramanian
patent: 4274124 (1981-06-01), Feinberg et al.
patent: 4401942 (1983-08-01), Renz
patent: 4409608 (1983-10-01), Yoder
patent: 4425541 (1984-01-01), Burkum et al.
patent: 4434401 (1984-02-01), York
patent: 4464621 (1984-08-01), Prigent et al.
patent: 4536704 (1985-08-01), Burkum et al.
patent: 4543594 (1985-09-01), Mohsen et al.
patent: 4571543 (1986-02-01), Raymond et al.
patent: 4805063 (1989-02-01), Kataoka et al.
patent: 4931721 (1990-06-01), Berrigan et al.
patent: 4937649 (1990-06-01), Shiba et al.
patent: 5101106 (1992-03-01), Cox, Jr. et al.
patent: 5208725 (1993-05-01), Akcasu
patent: 5246884 (1993-09-01), Jaso et al.
patent: 5357225 (1994-10-01), Mortensen
patent: 5394294 (1995-02-01), Mei et al.
patent: 5446310 (1995-08-01), Baliga et al.
patent: 5449948 (1995-09-01), Inoue et al.
patent: 5459633 (1995-10-01), Kosslowski et al.
patent: 5576240 (1996-11-01), Radosevich et al.
patent: 5583359 (1996-12-01), Ng et al.
patent: 5821142 (1998-10-01), Sung et al.
patent: 5939766 (1999-08-01), Stimeijer et al.
patent: 6045716 (2000-04-01), Walsh et al.
patent: 6069069 (2000-05-01), Chooi et al.
patent: 6258712 (2001-07-01), Wang
patent: 6307250 (2001-10-01), Krauter et al.
“Decoupling Circuit Structure to Reduce Electrical Noise”, IBM Technical Disclosure Bulletin, vol. 37, No. 9, Sep. 1994.
“Limiting the Short-Circuit Current in Deffective Integrated Decoupling Capacitors”, IBM Technical Disclosure Bulletin, vol. 33, No. 6B, Nov. 1990.

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