Method and apparatus for simultaneous differential data...

Details Method and apparatus for simultaneous differential data... Method and apparatus for simultaneous differential data...

2007-09-11

2007-09-11

Mai, Son L. (Department: 2827)

Static information storage and retrieval

Read/write circuit

Having particular data buffer or latch

C365S190000, C365S205000

Reexamination Certificate

active

10337346

ABSTRACT:
A differential data sensing and capture circuit, includes a differential input stage circuit for receiving respective ones of said differential data signals and having first and second output nodes. A latch element is provided, having first and second complementary inputs coupled to receive signals from said respective first and second output nodes. A gating circuit dynamically enables and disables a clock signal to the differential input stage in response to an enable signal, such that power consumption in said differential input stage is conserved. In a further embodiment the enable signal is a complementary clock input signal.

REFERENCES:
patent: 5297092 (1994-03-01), Johnson
patent: 5452239 (1995-09-01), Dai et al.
patent: 5485430 (1996-01-01), McClure
patent: 5959899 (1999-09-01), Sredanovic
patent: 5977798 (1999-11-01), Zerbe
patent: 6201418 (2001-03-01), Allmon

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