Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2007-05-29
2007-05-29
Doan, Theresa T. (Department: 2814)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S195000
Reexamination Certificate
active
11453638
ABSTRACT:
A method for manufacturing a semiconductor element, comprises: (1) forming a first insulating layer for electric field relaxation that is thicker than a first gate insulating layer in a first channel region of a transistor of a first conductive type that is one of P-type and N-type polarity formed on a semiconductor silicon wafer to surround an edge of a first gate electrode in order to reduce an electric field concentrated to a region surrounding the edge of the first gate electrode because of a voltage applied to the first gate electrode and a first drain region of the transistor of the first conductive type, and forming a second insulating layer for electric field relaxation that is thicker than a second gate insulating layer in a second channel region of a transistor of a second conductive type to surround the edge of the first gate electrode in order to reduce an electric field concentrated to a region surrounding an edge of a second gate electrode because of a voltage applied to the second gate electrode and a second drain region of the transistor of the second conductive type; (2) forming a first photoresist layer in an uppermost section of the wafer.
REFERENCES:
patent: 6323075 (2001-11-01), Ammo et al.
patent: 6403409 (2002-06-01), You
patent: 06-029313 (1994-02-01), None
patent: 11-008388 (1999-01-01), None
Akira Takahisa
Hayashi Masahiro
Shiraishi Akihiro
Doan Theresa T.
Hogan & Hartson LLP
Seiko Epson Corporation
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