Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Patent
1998-02-26
2000-03-07
Tu, Trinh L.
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital logic testing
714731, G01R 3128
Patent
active
060354313
ABSTRACT:
A semiconductor integrated circuit (1) has a scan test circuit (6) and a target test circuit (4), connected to a CPU (3) and a RAM (2) through internal buses (5a and 5b) that are mounted on a same semiconductor chip. The scan test circuit (6) provides test signals to the target test circuit (4) having a plurality of flip flops connected one another in a line like a string of beads as a shift register.
REFERENCES:
patent: 5394403 (1995-02-01), Klein
patent: 5416409 (1995-05-01), Hunter
patent: 5544174 (1996-08-01), Abend
patent: 5708773 (1998-01-01), Jeppesen, III et al.
Mitsubishi Denki & Kabushiki Kaisha
Tu Trinh L.
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