Output prediction logic circuits with ultra-thin vertical...

Details Output prediction logic circuits with ultra-thin vertical... Output prediction logic circuits with ultra-thin vertical...

2007-05-15

2007-05-15

Tran, Minhloan (Department: 2826)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S329000, C257SE29131

Reexamination Certificate

active

11080443

ABSTRACT:
Very fast integrated OPL circuits, such as pseudo-NMOS OPL and dynamic OPL, comprising CMOS gate arrays having ultra-thin vertical NMOS transistors are disclosed. The ultra-thin vertical NMOS transistors of the CMOS gate arrays are formed with relaxed silicon germanium (SiGe) body regions with graded germanium content and strained silicon channels.

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