IC with separate scan paths and shift states

Details IC with separate scan paths and shift states IC with separate scan paths and shift states

2006-12-26

2006-12-26

Chung, Phung My (Department: 2138)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital logic testing

C714S729000, C714S030000

Reexamination Certificate

active

07155650

ABSTRACT:
Plural scan test paths (401) are provided to reduce power consumed during testing such as combinational logic (101). A state machine (408) operates according to plural shift states (500) to control each scan path in capturing data from response outputs of the combinational logic and then shifting one bit at a time to reduce the capacitive and constant state power consumed by shifting the scan paths.

REFERENCES:
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patent: 5606566 (1997-02-01), Whetsel
patent: 5677915 (1997-10-01), Whetsel
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patent: 5862152 (1999-01-01), Handly et al.
patent: 6519729 (2003-02-01), Whetsel
patent: 6779133 (2004-08-01), Whetsel
patent: 2002/0104050 (2002-08-01), Saxena et al.

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