Efficient word recognizer for a logic analyzer

Details Efficient word recognizer for a logic analyzer Efficient word recognizer for a logic analyzer

2006-08-22

2006-08-22

Kerveros, James C. (Department: 2138)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital logic testing

Reexamination Certificate

active

07096395

ABSTRACT:
A system having multiple on-chip logic analyzers (OCLA), each on-chip logic analyzer includes one or more word recognizers. The word recognizer includes a great deal of flexibility for the user, while being capable of implementation with very few gates. The word recognizer includes a Boolean logic portion in which a plurality of conditions can be dynamically segregated into a mutually exclusive set of groups. The conditions in each group are combined by means of a single Boolean function that is programmable. The resultant term (or product) from each group is combined with those of the other groups by a fixed selection of Boolean functions. The output of the Boolean logic section is provided to a counter/timer.

REFERENCES:
patent: 6633838 (2003-10-01), Arimilli et al.

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