Method of manufacturing a nonvolatile semiconductor memory...

Details Method of manufacturing a nonvolatile semiconductor memory... Method of manufacturing a nonvolatile semiconductor memory...

2006-06-13

2006-06-13

Kebede, Brook (Department: 2823)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S424000

Reexamination Certificate

active

07060559

ABSTRACT:
In a method of manufacturing a semiconductor device having a nonvolatile semiconductor memory element with a two-layered gate structure in which a floating gate and control gate are stacked, a polysilicon layer serving as the floating gate is stacked on a silicon substrate via a tunnel insulating film. Then, the silicon layer, tunnel insulating film, and substrate are selectively etched to form an element isolation trench. A nitride film is formed on the sidewall surface of the silicon layer exposed into the element isolation trench. An oxide film is buried in the element isolation trench. A conductive film serving as the control gate is stacked on the oxide film and silicon layer via an electrode insulating film. The conductive film, electrode insulating film, and silicon layer are selectively etched to form the control gate and floating gate.

REFERENCES:
patent: 5866930 (1999-02-01), Saida et al.
patent: 6191002 (2001-02-01), Koyanagi
patent: 6228717 (2001-05-01), Hazama et al.
patent: 6235589 (2001-05-01), Meguro
patent: 6239041 (2001-05-01), Tanabe et al.
patent: 6342715 (2002-01-01), Shimizu et al.
patent: 6580117 (2003-06-01), Shimizu
patent: 6677639 (2004-01-01), Lee et al.
patent: 2002/0100930 (2002-08-01), Yaegashi
patent: 2003/0119257 (2003-06-01), Dong et al.
patent: 09-008156 (1997-01-01), None
patent: 9-64209 (1997-03-01), None
patent: 2000-188343 (2000-07-01), None
patent: 2001-015618 (2001-01-01), None
patent: 2001-15753 (2001-01-01), None
patent: 2001-015753 (2001-01-01), None
patent: 3178412 (2001-04-01), None
patent: 2001-319927 (2001-11-01), None
patent: 2003-197788 (2003-07-01), None
Yoshio Ozawa et al., U.S. Appl. No.: 09/559,757, Filed Apr. 27, 2000, For:Semiconductor Device and Method of Manufacture Thereof.
Notification of Reasons for Rejection issued by Japanese Patent Office in Japanese application No. 2002-347792 and English translation thereof.
Final Notice of Rejection issued by Japanese Patent Office in Japanese application No. 2002-347792 and English translation thereof.

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