Method of fabricating non-volatile memory

Details Method of fabricating non-volatile memory Method of fabricating non-volatile memory

2006-12-12

2006-12-12

Booth, Richard A. (Department: 2812)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C257SE21209

Reexamination Certificate

active

07148107

ABSTRACT:
A method of fabricating a non-volatile memory is described. A substrate having a memory cell region and a peripheral circuit region is provided. A plurality of first stacked gate structures is formed on the memory cell region and a stacked structure is formed on the peripheral circuit region. A conductive layer is formed on the substrate to form a plurality of gates between the first stacked gate structures, thereby forming a memory cell row. A plurality of conductive spacers is formed on the sidewalls of the memory cell row and the stacked structure. A patterned mask layer is formed on the substrate to cover at least the memory cell row and the conductive spacers. The stacked structure is patterned to form a plurality of second stacked gate structures on the peripheral circuit region.

REFERENCES:
patent: 6927129 (2005-08-01), Sun et al.
patent: 2002/0132428 (2002-09-01), Chien et al.
patent: 2005/0176202 (2005-08-01), Hisamoto et al.

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