Method and related apparatus for locking phase with...

Electrical computers and digital processing systems: support – Synchronization of clock or timing signals – data – or pulses

Reexamination Certificate

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C375S373000

Reexamination Certificate

active

07085949

ABSTRACT:
A method and related apparatus for providing a clock synchronized with an input signal. The method includes generating an estimated rate according to transitions in the input signal, processing a dithering step for updating the estimated rate by multiplying it with a predetermined ratio, and adjusting the frequency of the clock according to the updated estimated rate. The predetermined ratios used in repeated dithering steps are modified according to a predetermined rule such that the predetermined ratio is different when the dithering steps are repeated.

REFERENCES:
patent: 4105948 (1978-08-01), Wolkstein
patent: 4590602 (1986-05-01), Wolaver
patent: 5963608 (1999-10-01), Casper et al.
patent: 6133770 (2000-10-01), Hasegawa
patent: 6181211 (2001-01-01), Aho et al.
patent: 6859509 (2005-02-01), Koudelka
patent: 2003/0058010 (2003-03-01), DeCusatis et al.

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