Silicided buried bitline process for a non-volatile memory cell

Details Silicided buried bitline process for a non-volatile memory cell Silicided buried bitline process for a non-volatile memory cell

2006-10-24

2006-10-24

Owens, Douglas W. (Department: 2811)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S211000, C438S257000

Reexamination Certificate

active

07125763

ABSTRACT:
A process of fabricating a memory cell that includes a substrate that has a first region and a second region with a channel therebetween by forming a gate above the channel of the substrate, forming a bitline and siliciding the bitline.

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