Wafer-level moat structures

Active solid-state devices (e.g. – transistors – solid-state diode – Incoherent light emitter structure – With housing or contact structure

Reexamination Certificate

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C438S015000, C257S692000

Reexamination Certificate

active

07126164

ABSTRACT:
A wafer-level CSP (200) includes at least one die (202) from a wafer. The wafer-level CSP has a plurality of solder ball pads (206), a solder ball (308) at each solder ball pad and a polymer collar (310) around each solder ball. A moat (204) is formed in the surface of a polymer layer (412) disposed on the wafer during manufacturing of the wafer-level CSP. A temporarily liquified residual (502) from the polymer collar, which occurs while the wafer is heated to the reflow temperature of the solder ball, flows from the polymer collar. The moat acts as a barrier to material flow, limiting the distance that the residual spreads while liquified. The residual from the polymer collar remains within a region (314) defined by the moat. A full-depth moat (312) extends completely through the polymer layer. Alternatively, a partial-depth moat (712and912) extends partially through the polymer layer. The abstract is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims pursuant to 37 C.F.R. §1.72(b).

REFERENCES:
patent: 4761386 (1988-08-01), Buynoski
patent: 6287893 (2001-09-01), Elenius et al.
patent: 6296552 (2001-10-01), Boutaghou et al.
patent: 6362112 (2002-03-01), Hamerski
patent: 6437434 (2002-08-01), Sugizaki
patent: 6465811 (2002-10-01), Peters et al.
patent: 6548896 (2003-04-01), Guida
patent: 6548897 (2003-04-01), Grigg
patent: 6578755 (2003-06-01), Elenius et al.
patent: 2002/0195662 (2002-12-01), Eden et al.
patent: 2003/0008221 (2003-01-01), Tsai et al.

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