Semiconductor device placing high, medium, and low voltage...

Details Semiconductor device placing high, medium, and low voltage... Semiconductor device placing high, medium, and low voltage...

2006-08-01

2006-08-01

Estrada, Michelle (Department: 2823)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S787000, C438S981000

Reexamination Certificate

active

07084035

ABSTRACT:
A method for forming three kinds of MOS transistors on a single semiconductor substrate, each provided with gate oxides different in thickness from each other, without detracting from the device characteristics. The method includes the steps of forming a dielectric layer for device isolation for defining first, second, and third regions, and buffer oxide layers on the surface of a semiconductor substrate; after forming an oxidation resistance layer, which has an opening for exposing the first region, performing a first thermal oxidation process for forming a first gate oxide layer overlaying the first region; forming a first gate electrode on the first gate oxide layer; removing the buffer oxide layer overlying the third region, having an opening for exposing the third region; performing a second thermal oxidation process for forming a second gate oxide layer, having a thickness different from the first gate oxide, and for forming a third gate oxide layer having a thickness different from the first, and the second gate oxides.

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