Encapsulation wafer process

Details Encapsulation wafer process Encapsulation wafer process

2006-10-10

2006-10-10

Whitehead, Jr., Carl (Department: 2813)

Semiconductor device manufacturing: process

Bonding of plural semiconductor substrates

Having enclosed cavity

C438S689000

Reexamination Certificate

active

07118991

ABSTRACT:
A method of processing a wafer, and particularly a cap wafer configured for mating with a device wafer in the production of a die package. Masking layers are deposited on oxide layers present on opposite surfaces of the wafer, after which the masking layers are etched to expose regions of the underlying oxide layers. Thereafter, an oxide mask is formed on the exposed regions of the oxide layers, but is prevented from forming on other regions of the oxide layers masked by the masking layers. The masking layers are then removed and the underlying regions of the oxide layers and the wafer are etched to simultaneously produce through-holes and recesses in the wafer. The oxide mask is then removed to allow mating of the cap wafer with a device wafer.

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Wolf et al., Silicon Processing for the VLSI Era, vol. 1, Lattice Press, 2000, pp. 265, 268.
EP Search Report dated Feb. 17, 2006.

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