Semiconductor memory with nonvolatile memory cell array and...

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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C257S315000, C257S316000

Reexamination Certificate

active

07002203

ABSTRACT:
A semiconductor device at least has a memory cell array. The memory cell array has active regions extending linearly in parallel with one another at predetermined intervals and each containing alternating source and drain regions, gate electrodes orthogonally crossing the active regions between the source and drain regions and each having a floating gate and a control gate laid one upon another, first conductors extending linearly in parallel with the gate electrodes and connected to corresponding ones of the source regions through source contacts, and second conductors connected to corresponding ones of the drain regions through drain contacts.

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patent: 5736442 (1998-04-01), Mori
patent: 5850091 (1998-12-01), Li et al.
patent: 6060741 (2000-05-01), Huang
patent: 6201275 (2001-03-01), Kawasaki et al.
patent: 6240021 (2001-05-01), Mori
patent: 6355526 (2002-03-01), Furuhata
H. Watanabe, et al. “Novel 0.44 μm2 Ti-Salicides STI Cell Technology for High-Density NOR Flash Memories and High Performance Embedded Application” IEDM Technical Digest, 1998 pp. 975-978.

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