Electronic digital logic circuitry – Clocking or synchronizing of logic stages or gates
Reexamination Certificate
2006-02-07
2006-02-07
Tran, Anh Q. (Department: 2819)
Electronic digital logic circuitry
Clocking or synchronizing of logic stages or gates
C326S094000, C326S021000, C326S026000
Reexamination Certificate
active
06995585
ABSTRACT:
A self-timed data transmission system includes a data bit group defined by at least two data bits to be transmitted from a corresponding plurality of transmitting storage elements. A corresponding plurality of data receiving storage elements receives the data transmitted from said transmitting storage elements. Encoding logic is used for encoding the transmitted data from the transmitting storage elements, wherein the encoded transmitted data is coupled to a plurality of data lines. The encoding logic is further configured so as to result in only one of the plurality of data lines being activated during a given data transmission cycle.
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Anand Darren L.
Barth, Jr. John E.
Tran Anh Q.
Walsh Robert A.
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