Method of isolating the current sense on power devices while...

Details Method of isolating the current sense on power devices while... Method of isolating the current sense on power devices while...

2006-10-10

2006-10-10

Blum, David S. (Department: 2813)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S281000, C438S333000

Reexamination Certificate

active

07118951

ABSTRACT:
An integrated circuit die includes an active area having source dopants and contacts. An active area metal layer overlies the active area. A sense area is disposed on the die. A sense area metal layer overlies the sense area. A plurality of polysilicon gate stripes, polysilicon openings, and body stripes are disposed on the die, and extend in a continuous and uninterrupted manner from the active area into the sense area. A first region from which source dopants and contacts have been excluded surrounds a periphery of the sense area. An etched region is disposed over the first region, thereby separating and electrically isolating the sense area metal layer from the active area metal layer.

REFERENCES:
patent: 6140680 (2000-10-01), Pulvirenti

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