Method for fabricating semiconductor packages

Details Method for fabricating semiconductor packages Method for fabricating semiconductor packages

2006-10-31

2006-10-31

Kebede, Brook (Department: 2823)

Semiconductor device manufacturing: process

Packaging or treatment of packaged semiconductor

Making plural separate devices

C438S108000, C438S109000, C438S110000, C438S114000, C257S678000, C257S684000, C257S710000

Reexamination Certificate

active

07129119

ABSTRACT:
A method for fabricating semiconductor packages is proposed. A plurality of substrates are prepared each having a chip thereon. Length and width of each substrate are equal to predetermined length and width of the semiconductor package. A carrier having a plurality of openings is prepared. A protruded portion is formed at each corner of each opening, wherein a distance between two diagonal protruded portions is slightly larger than that between two diagonal corners of the substrate. The substrates are fixed in the openings of the carrier by means of the protruded portions, and gaps between the substrates and the carrier are sealed. An encapsulant is formed over each opening to encapsulate the corresponding chip by a molding process. An area on the carrier covered by the encapsulant is larger in length and width than the opening. A plurality of the semiconductor packages are formed after performing mold-releasing and singulation processes.

REFERENCES:
patent: 6038136 (2000-03-01), Weber
patent: 6444498 (2002-09-01), Huang et al.
patent: 6699731 (2004-03-01), Huang et al.
patent: 6830957 (2004-12-01), Pu et al.
patent: 2005/0287707 (2005-12-01), Lin et al.
patent: 559960 (2003-11-01), None

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