Memory systems and methods

Details Memory systems and methods Memory systems and methods

2006-10-03

2006-10-03

Nguyen, Van Thu (Department: 2824)

Static information storage and retrieval

Read/write circuit

Having particular data buffer or latch

C365S189040, C365S154000

Reexamination Certificate

active

07116585

ABSTRACT:
Systems and methods are disclosed for memory, including techniques for reading and writing to memory. For example, in accordance with an embodiment of the present invention, a method of implementing a read and a write operation (e.g., a read before write operation) is disclosed for a memory, such as for example for a single port or a multiport memory, with the write operation beginning prior to the completion of the read operation.

REFERENCES:
patent: 6028812 (2000-02-01), Tanaka
patent: 6072738 (2000-06-01), Brown
patent: 6295238 (2001-09-01), Tanizaki et al.
patent: 6549452 (2003-04-01), Park
patent: 2003/0058688 (2003-03-01), Nguyen
McLaury et al., U.S. Appl. No. 10/243,014, filed Sep. 13, 2002 (pp. 1-49, FIG. pp. 1-16).

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