Method and system for programmable boundary-scan instruction...

Details Method and system for programmable boundary-scan instruction... Method and system for programmable boundary-scan instruction...

2006-07-04

2006-07-04

Decady, Albert (Department: 2138)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital logic testing

Reexamination Certificate

active

07073110

ABSTRACT:
A flexible architecture for extending the instruction set for a boundary-scan interface. An instruction can be selected from a memory store (308) and decoded by a decoder (310). The instruction can subsequently be shifted into an instruction register (349) where it can be executed. Alternatively, a length of an existing instruction register (382) of a boundary-scan interface can be programmably appended to effectively increase the length of the register. A plurality of serially arranged bit registers (376, 378, 380) can be connected in series with the existing instruction register. By selecting an outer one of the serially arranged bit registers, the length of the existing instruction register can be extended.

REFERENCES:
patent: 5872793 (1999-02-01), Attaway et al.
patent: 6408414 (2002-06-01), Hatada

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