Semiconductor chip package

Details Semiconductor chip package Semiconductor chip package

2006-05-02

2006-05-02

Whitehead, Jr., Carl (Department: 2813)

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Bump leads

C257S673000, C257S666000, C257S737000, C257S780000

Reexamination Certificate

active

07038315

ABSTRACT:
A semiconductor chip package that includes discrete conductive leads in electrical contact with bond pads on a semiconductor chip. This chip/lead assembly is encapsulated within an encapsulating material and electrode bumps are formed through the encapsulating material to contact the conductive leads. The electrode bumps protrude from the encapsulating material for connection to an external circuit.

REFERENCES:
patent: 3959874 (1976-06-01), Coucoulas
patent: 5136366 (1992-08-01), Worp et al.
patent: 5139969 (1992-08-01), Mori
patent: 5157480 (1992-10-01), McShane et al.
patent: 5239198 (1993-08-01), Lin et al.
patent: 5273938 (1993-12-01), Lin et al.
patent: 5289346 (1994-02-01), Carey et al.
patent: 5293072 (1994-03-01), Tsuji et al.
patent: 5299729 (1994-04-01), Matsushita et al.
patent: 5302849 (1994-04-01), Cavasin
patent: 5309021 (1994-05-01), Shimamoto et al.
patent: 5341564 (1994-08-01), Akhavain et al.
patent: 5355283 (1994-10-01), Marrs et al.
patent: 5362679 (1994-11-01), Wakefield
patent: 5373190 (1994-12-01), Ichiyama
patent: 5397921 (1995-03-01), Karnezos
patent: 5403776 (1995-04-01), Tsuji et al.
patent: 5420460 (1995-05-01), Massingill
patent: 5442231 (1995-08-01), Miyamoto et al.
patent: 5442233 (1995-08-01), Anjoh et al.
patent: 5444301 (1995-08-01), Song et al.
patent: 5474957 (1995-12-01), Urushima
patent: 5519251 (1996-05-01), Sato et al.
patent: 5554887 (1996-09-01), Sawai et al.
patent: 5583375 (1996-12-01), Tsubosaki
patent: 5608265 (1997-03-01), Kitano et al.
patent: 5663106 (1997-09-01), Karavakis et al.
patent: 5677566 (1997-10-01), King et al.
patent: 5729051 (1998-03-01), Nakamura
patent: 5763939 (1998-06-01), Yamashita
patent: 5777382 (1998-07-01), Abbott et al.
patent: 5804468 (1998-09-01), Tsuji et al.
patent: 5849608 (1998-12-01), Abe
patent: 5856212 (1999-01-01), Chun
patent: 5894107 (1999-04-01), Lee et al.
patent: 5945741 (1999-08-01), Ohsawa et al.
patent: 5969413 (1999-10-01), Yano et al.
patent: 5976912 (1999-11-01), Fukutomi et al.
patent: 5977613 (1999-11-01), Takata et al.
patent: 5982026 (1999-11-01), Tsunoda
patent: 6191493 (2001-02-01), Yasunaga et al.
patent: 6240632 (2001-06-01), Ito et al.
patent: 0 490 499 (1992-06-01), None
patent: 357018348 (1982-01-01), None
patent: 359148352 (1984-08-01), None
patent: 401196153 (1989-08-01), None
patent: 404225263 (1992-08-01), None
patent: 4-277636 (1992-10-01), None
patent: 405082582 (1993-04-01), None
patent: 408097325 (1996-04-01), None
patent: 08-167676 (1996-06-01), None
Shinko Technology Update, Dec. 12, 1994, p. 141.
“Mitsubishi scales down IC package,” Electronic Engineering Times, Aug. 22, 1994, p. 13.
TA 8.2: A 34 ns 256 Mb DRAM with Boosted Sense-Ground Scheme, 1994 IEEE International Solid-State Circuits Conference Digest of Technical Papers, pp. 140-141.
“Sandia Shrinks Size of BGA Packages,” May 16, 1994, Electronic Engineering Times, p. 57.
“Moto Gets ‘Slicc’ With Packaging,” Feb. 28, 1994, Electronic Engineering Times, pp. 1, 100.

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