Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2006-01-03
2006-01-03
Sarkar, Asok Kumar (Department: 2891)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S264000, C438S304000, C438S596000
Reexamination Certificate
active
06982201
ABSTRACT:
A new structure is disclosed for semiconductor devices in which contact regions are self-aligned to conductive lines. Openings to a gate oxide layer, in partially fabricated devices on a silicon substrate, have insulating sidewalls. First polysilicon lines disposed against the insulating sidewalls extend from below the top of the openings to the gate oxide layer. Oxide layers are grown over the top and exposed sides of the first polysilicon lines serving to insulate the first polysilicon lines. Polysilicon contact regions are disposed directly over and connect to silicon substrate regions through openings in the gate oxide layer and fill the available volume of the openings. Second polysilicon lines connect to the contact regions and are disposed over the oxide layers grown on the first polysilicon lines.
REFERENCES:
patent: 5091327 (1992-02-01), Bergemont
patent: 5679591 (1997-10-01), Lin et al.
patent: 5691937 (1997-11-01), Ohta
patent: 6090668 (2000-07-01), Lin et al.
patent: 6211012 (2001-04-01), Lee et al.
patent: 6228695 (2001-05-01), Hsieh et al.
patent: 6858494 (2005-02-01), Hsieh
Sarkar Asok Kumar
Taiwan Semiconductor Manufacturing Co. Ltd.
Thomas Kayden Horstemeyer & Risley
LandOfFree
Structure and fabricating method with self-aligned bit line... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Structure and fabricating method with self-aligned bit line..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Structure and fabricating method with self-aligned bit line... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3578398