Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2006-03-07
2006-03-07
Lebentritt, Michael (Department: 2812)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S257000, C257S314000, C257S315000
Reexamination Certificate
active
07008846
ABSTRACT:
A non-volatile memory cell has a single crystalline semiconductive material, such as single crystalline silicon, of a first conductivity type. A first and a second region each of a second conductivity type, different from the first conductivity type, spaced apart from one another is formed in the semiconductive material. A channel region, having a first portion, a second portion and a third portion connects the first and second regions for the conduction of charges. The first portion is adjacent to the first region, the third portion is adjacent to the second region, and the second portion is between the first portion and the third portion. A first dielectric is on the channel region. A second dielectric is on the first region. A third dielectric is on the second region. A first floating gate, formed as a spacer, is immediately adjacent to and contiguous with the second dielectric and is adjacent to the first dielectric and is spaced apart from the first portion of the channel region. A second floating gate, formed as a spacer, is immediately adjacent to and contiguous with the third dielectric and is adjacent to the first dielectric and is spaced apart from the third portion of the channel region. A gate electrode is capacitively coupled to the first and second floating gates and is spaced apart from the second portion of the second portion.
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DLA Piper Rudnick Gray Cary US LLP
Geyer Scott B.
Lebentritt Michael
Silicon Storage Technology, Inc.
Yin Ronald L.
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