Round-robin updating for high speed I/O parallel interfaces

Details Round-robin updating for high speed I/O parallel interfaces Round-robin updating for high speed I/O parallel interfaces

2006-03-21

2006-03-21

Decady, Albert (Department: 2133)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Transmission facility testing

C714S731000, C714S744000, C713S400000, C702S089000

Reexamination Certificate

active

07017086

ABSTRACT:
A technique for adjusting a communication system involves a plurality of links where each link includes a data line adapted to transmit a data signal and a clock line adapted to transmit a clock signal. A test circuit connects to the plurality of links where the test circuit tests at least one of the plurality of links. The test circuit includes an adjustment circuit arranged to generate an adjustable clock signal from the clock signal of the one of the plurality of links based on an offset where the adjustment circuit adjusts a timing of the adjustable clock signal relative to the data signal of the one of the plurality of links. The test circuit is adapted to perform a round-robin testing of the plurality of the links.

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