Method of filling bit line contact via

Details Method of filling bit line contact via Method of filling bit line contact via

2006-04-11

2006-04-11

Pham, Thanhha (Department: 2813)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S241000, C438S675000

Reexamination Certificate

active

07026207

ABSTRACT:
A method of filling a bit line contact via. The method includes providing a substrate having a device region and periphery region, the device region having a transistor, having a gate electrode, drain region, and source region, on the substrate, forming a dielectric layer overlying the substrate, the dielectric layer having a bit line contact via exposing the drain region, and periphery contact via exposing the periphery region, forming a doped conductive layer, lower than the dielectric layer, overlying the drain region, conformally forming a barrier layer overlying the dielectric layer, doped conductive layer, and periphery region, and forming a first conductive layer filling the bit line contact via and periphery contact via.

REFERENCES:
patent: 6069038 (2000-05-01), Hashimoto et al.
patent: 6271131 (2001-08-01), Uhlenbrock et al.
patent: 6458651 (2002-10-01), Rhodes

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