Method of forming a silicon oxide layer in a semiconductor...

Semiconductor device manufacturing: process – Coating of substrate containing semiconductor region or of...

Reexamination Certificate

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C438S694000, C438S787000, C427S314000, C427S387000

Reexamination Certificate

active

07053005

ABSTRACT:
A method of forming a silicon oxide layer in a semiconductor manufacturing process includes forming a planar spin on glass (SOG) layer by coating an SOG composition onto a semiconductor substrate having a stepped portion formed thereon, pre-baking the substrate at a temperature of from about 100 to about 500° C. for about 1 to about 10 minutes, maintaining a loading temperature of a furnace into which the substrate will be loaded at about 500° C. or less, loading the substrate into the furnace, and main-baking the substrate at a temperature of from about 500 to about 1200° C. for about 10 to about 120 minutes to form a silicon oxide layer on the substrate. The SOG layer is transformed into the silicon oxide layer through an optimized process condition. Thus, the silicon oxide layer may have minimal defects and a good layer property.

REFERENCES:
patent: 4572765 (1986-02-01), Berry
patent: 4937304 (1990-06-01), Ayama et al.
patent: 4950381 (1990-08-01), Takeuchi et al.
patent: 5310720 (1994-05-01), Shin et al.
patent: 5405790 (1995-04-01), Rehim et al.
patent: 5428240 (1995-06-01), Lur
patent: 5436398 (1995-07-01), Shimizu et al.
patent: 5494978 (1996-02-01), Shimizu et al.
patent: 5614271 (1997-03-01), Shibuya et al.
patent: 5665643 (1997-09-01), Shin
patent: 5738911 (1998-04-01), Imamura et al.
patent: 5770260 (1998-06-01), Fukuyama et al.
patent: 5822658 (1998-10-01), Tanaka et al.
patent: 5839029 (1998-11-01), Kataoka et al.
patent: 5885654 (1999-03-01), Hagiwara et al.
patent: 5905130 (1999-05-01), Nakahara et al.
patent: 5907382 (1999-05-01), Kajiura et al.
patent: 5922411 (1999-07-01), Shimizu et al.
patent: 5974666 (1999-11-01), Tanaka et al.
patent: 5976618 (1999-11-01), Fukuyama et al.
patent: 5989945 (1999-11-01), Yudasaka et al.
patent: 6133137 (2000-10-01), Usami
patent: 6187662 (2001-02-01), Usami et al.
patent: 6190788 (2001-02-01), Shibuya et al.
patent: 6215144 (2001-04-01), Saito et al.
patent: 6235620 (2001-05-01), Saito et al.
patent: 6261883 (2001-07-01), Koubuchi et al.
patent: 6330190 (2001-12-01), Wang et al.
patent: 6338868 (2002-01-01), Shibuya et al.
patent: 6656532 (2003-12-01), Forester
patent: 6706646 (2004-03-01), Lee et al.
patent: 6762126 (2004-07-01), Cho et al.
patent: 0 825 231 (1998-02-01), None
patent: 1 002 824 (2000-05-01), None
patent: 1 278 238 (2003-01-01), None
patent: 11145286 (1999-05-01), None
patent: 2000-58646 (2000-02-01), None
patent: 1999-0068074 (1999-08-01), None
patent: 2000-0023448 (2000-04-01), None
patent: 2000-0059365 (2000-10-01), None
Machine translation of JP 08-269399, Oct. 1996, Nakajima et al. (obtained from JPO website).
Machine translation of JP 09-047722, Feb. 1997, Shibuya et al. (obtained from JPO website).

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