Semiconductor device manufacturing: process – Coating of substrate containing semiconductor region or of... – By reaction with substrate
Reexamination Certificate
2006-03-07
2006-03-07
Zarneke, David (Department: 2891)
Semiconductor device manufacturing: process
Coating of substrate containing semiconductor region or of...
By reaction with substrate
C438S770000, C438S935000, C438S431000, C438S438000, C438S305000, C438S787000
Reexamination Certificate
active
07008880
ABSTRACT:
A method for fabricating a semiconductor integrated circuit device of the invention comprises feeding oxidation species containing a low concentration of water, which is generated from hydrogen and oxygen by the catalytic action, to the main surface of or in the vicinity of a semiconductor wafer, and forming a thin oxide film serving as a gate insulating film of an MOS transistor and having a thickness of 5 nm or below on the main surface of the semiconductor wafer at an oxide film-growing rate sufficient to ensure fidelity in formation of an oxide film and uniformity in thickness of the oxide film.
REFERENCES:
patent: 3857927 (1974-12-01), Henrie
patent: 4119706 (1978-10-01), Rogers
patent: 4139658 (1979-02-01), Cohen et al.
patent: 4374116 (1983-02-01), Chuang et al.
patent: 4376796 (1983-03-01), Arrasmith et al.
patent: 4579723 (1986-04-01), Weltmer et al.
patent: 4668260 (1987-05-01), Yoshino
patent: 4836929 (1989-06-01), Baumann et al.
patent: 5244843 (1993-09-01), Chau et al.
patent: 5686345 (1997-11-01), Harmon et al.
patent: 5693578 (1997-12-01), Nakanishi et al.
patent: 5716871 (1998-02-01), Yamazaki et al.
patent: 5751025 (1998-05-01), Heminger et al.
patent: 5777300 (1998-07-01), Homma et al.
patent: 5786263 (1998-07-01), Perera
patent: 5840368 (1998-11-01), Ohmi
patent: 5851892 (1998-12-01), Lojek et al.
patent: 5861347 (1999-01-01), Maiti et al.
patent: 5880041 (1999-03-01), Ong
patent: 5959329 (1999-09-01), Tomita et al.
patent: 6037273 (2000-03-01), Gronet et al.
patent: 6110531 (2000-08-01), Paz De Araujo et al.
patent: 6239041 (2001-05-01), Tanabe et al.
patent: 6362086 (2002-03-01), Weimer et al.
patent: 2001/0006853 (2001-07-01), Tanabe et al.
patent: 2001/0009813 (2001-07-01), Tanabe et al.
patent: 2001/0010975 (2001-08-01), Tanabe et al.
patent: 2001/0024870 (2001-09-01), Tanabe et al.
patent: 2001/0042344 (2001-11-01), Ohmi et al.
patent: 2002/0004315 (2002-01-01), Tanabe et al.
patent: 2002/0019149 (2002-02-01), Tanabe et al.
patent: 0 666 237 (1995-08-01), None
patent: 0 671 761 (1995-09-01), None
patent: 55-003820 (1980-01-01), None
patent: 55-041805 (1980-03-01), None
patent: 57-49895 (1982-03-01), None
patent: 57-82102 (1982-05-01), None
patent: 58-19599 (1983-02-01), None
patent: 59-132136 (1984-07-01), None
patent: 60-107840 (1985-06-01), None
patent: 5-19746 (1993-03-01), None
patent: 5-114740 (1993-05-01), None
patent: 5-141871 (1993-06-01), None
patent: 5-144804 (1993-06-01), None
patent: 5-152282 (1993-06-01), None
patent: 6-115903 (1994-04-01), None
patent: 6-120206 (1994-04-01), None
patent: 6-163517 (1994-06-01), None
patent: 6-333918 (1994-12-01), None
patent: 7-10935 (1995-02-01), None
patent: 7-86264 (1995-03-01), None
patent: 7-115069 (1995-05-01), None
patent: 7-193059 (1995-07-01), None
patent: 07-273101 (1995-10-01), None
patent: 07-297181 (1995-11-01), None
patent: 07-297201 (1995-11-01), None
patent: 7-321102 (1995-12-01), None
patent: 8-111449 (1996-04-01), None
patent: 08-213379 (1996-08-01), None
patent: 09-090092 (1997-04-01), None
patent: 09-148315 (1997-06-01), None
patent: 9-148461 (1997-06-01), None
patent: 9-153489 (1997-06-01), None
patent: 9-172011 (1997-06-01), None
patent: 63-85630 (1998-06-01), None
patent: 10-284484 (1998-10-01), None
patent: 11-067747 (1999-03-01), None
patent: 11-074264 (1999-03-01), None
patent: 11-135492 (1999-05-01), None
patent: 11-162970 (1999-06-01), None
patent: 11-162971 (1999-06-01), None
patent: 11-186248 (1999-07-01), None
patent: 11-186255 (1999-07-01), None
patent: 11-204517 (1999-07-01), None
patent: 11-233508 (1999-08-01), None
patent: WO/9728085 (1997-07-01), None
Chinese Office Action, for Application No. 200410000801.4, with a date of Apr. 8, 2005, w/English translation of text thereof.
Y. Tanabe, et al., “Diluted Wet Oxidation: A Novel Technique for Ultra Thin Gate Oxide Formation”, IEEE International Symposium on Semiconductor Manufacturing Conference Proceedings, pp. 49-52, Oct. 1997. (XP000849644).
E. Kooi, et al., “Formation of Silicon Nitride at a Si-SiO2Interface during Local Oxidation of Silicon and during Heat-Treatment of Oxidized Silicon in NH3Gas”,Journal of Electrochemical Society,vol. 123, No. 7, pp. 1117-1120, Jul. 1976.
Nakamura, et al., “Proceedings of the 45thSymposium on Semiconductors and Integrated Circuits Technology”, Dec. 1-2, 1993. (full translation).
Natsuaki Nobuyoshi
Sakai Satoshi
Tanabe Yoshikazu
Antonelli, Terry Stout and Kraus, LLP.
Renesas Technology Corp.
Yevsikov Victor V.
Zarneke David
LandOfFree
Method for fabricating semiconductor integrated circuit device does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method for fabricating semiconductor integrated circuit device, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for fabricating semiconductor integrated circuit device will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3536263