Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2006-05-30
2006-05-30
Smith, Zandra V. (Department: 2822)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S637000, C438S675000
Reexamination Certificate
active
07052983
ABSTRACT:
Wirings including first conductive layer patterns and insulating mask layer patterns are formed on a substrate. Insulating spacers are formed on sidewalls of the wirings. Self-aligned contact pads including portions of a second conductive layer are formed to contact with surfaces of the insulating spacers and to fill up a gap between the wirings. An interlayer dielectric layer is formed on the substrate where the contact pads are formed and is then partially etched to form contact holes exposing the contact pads. A selective epitaxial silicon layer is formed on the contact pads exposed through the contact holes to cover the insulating mask layer patterns. Thus, a short-circuit between the lower wiring and an upper wiring formed in the contact holes is prevented.
REFERENCES:
patent: 5895948 (1999-04-01), Mori et al.
patent: 6030894 (2000-02-01), Hada et al.
patent: 6211091 (2001-04-01), Lien et al.
patent: 6297091 (2001-10-01), Roh et al.
patent: 6468853 (2002-10-01), Balasubramanian et al.
patent: 6472303 (2002-10-01), Weon et al.
patent: 6818537 (2004-11-01), Cheong
patent: 2001/0005623 (2001-06-01), Kim et al.
patent: 2002/0186601 (2002-12-01), Lee et al.
patent: 2003/0003718 (2003-01-01), Park et al.
patent: 2003/0022486 (2003-01-01), Wu
patent: 1999-84959 (1999-12-01), None
patent: 2002-58285 (2002-07-01), None
English language abstract of Korean Publication No. 1999-84959.
English language abstract of Korean Publication No. 2002-58285.
Kim Ji-Young
Park Byung-Jun
Duong Khanh
Marger & Johnson & McCollom, P.C.
Samsung Electronics Co,. Ltd.
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