Method and apparatus for improving memory operation and yield

Details Method and apparatus for improving memory operation and yield Method and apparatus for improving memory operation and yield

2006-07-04

2006-07-04

Lamarre, Guy (Department: 2138)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Replacement of memory spare location, portion, or segment

C714S718000

Reexamination Certificate

active

07073099

ABSTRACT:
A memory circuit includes a memory interface and a first memory that receives a first write address that is associated with first data from said memory interface. A second memory stores addresses of defective memory locations found in said first memory, receives said first write address from said memory interface, compares said first write address to said addresses stored in said memory, and, if a matching address is found, writes said first data to said second memory.

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