Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2006-01-17
2006-01-17
Booth, Richard A. (Department: 2812)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S305000
Reexamination Certificate
active
06987049
ABSTRACT:
In an example method for fabricating a transistor in a semiconductor device, a buffer insulation layer and a first insulation layer are deposited and etched, and poly electrodes for an LDD are formed on sidewalls of thereof. After a local channel region is formed into a semiconductor substrate by an impurity ion implantation process, a trench-shaped gate insulation layer is deposited on the gate region. A gate electrode material is deposited into the trench-shaped region and planarized by a blanket etchback or a CMP process. After a silicide is formed by a salicidation process, a second insulation layer and a third insulation layer are formed thereon, sequentially. Contact holes for a gate electrode, a source electrode and a drain electrode may etched and a conductive material may be filled therein, thereby forming a gate plug, a source contact plug and a drain plug.
REFERENCES:
patent: 5571738 (1996-11-01), Krivokapic
patent: 6583017 (2003-06-01), Hu et al.
patent: 2001/0016392 (2001-08-01), Ponomarev et al.
Booth Richard A.
DongbuAnam Semiconductor Inc.
Hanley Flight & Zimmerman LLC
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