Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2006-04-18
2006-04-18
Tran, Minhloan (Department: 2826)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S153000, C438S154000, C438S155000, C438S167000, C438S738000, C438S735000, C438S736000, C438S749000
Reexamination Certificate
active
07029965
ABSTRACT:
A method for efficiently manufacturing a semiconductor device, the semiconductor device having an FET and a pn junction diode provided on the same semiconductor substrate, the FET having a Schottky junction for a gate electrode and a gate recess, includes the steps of forming a channel layer, a first etching stopper layer, an n-type common layer, a second etching stopper layer, a p-type layer, and a third etching stopper layer on the semiconductor substrate in that order; etching away the p-type layer and the third etching stopper layer in specific regions; simultaneously forming a source electrode, a drain electrode, a cathode; forming a mask having an opening for forming a gate recess and a gate electrode and an opening for forming an anode; forming the gate recess by etching while the third etching stopper layer prevents the p-type layer from being etched; and simultaneously forming the gate electrode and the anode.
REFERENCES:
patent: 08-255838 (1996-10-01), None
patent: 08-340213 (1996-12-01), None
Keating & Bennett LLP
Murata Manufacturing Co. Ltd.
Tran Minhloan
Tran Tan
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