Process for manufacturing a substrate with embedded capacitor

Details Process for manufacturing a substrate with embedded capacitor Process for manufacturing a substrate with embedded capacitor

2005-11-22

2005-11-22

Coleman, W. David (Department: 2891)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S397000, C438S387000, C438S638000, C438S210000, C438S295000, C257S295000, C257S296000

Reexamination Certificate

active

06967138

ABSTRACT:
A process for manufacturing a substrate with an embedded capacitor is disclosed. A first metal wiring layer including a lower electrode pad is formed on a substrate base. A dielectric layer is formed a on the substrate base by build-up coating. A hole is formed in the dielectric layer to expose the lower electrode pad, then a medium material is filled into the hole. The medium material is ground to have a ground surface coplanar to the dielectric layer. A second metal wiring layer including an upper electrode pad is formed on dielectric layer, the upper electrode pad covers the ground surface of the medium material and is parallel to the lower electrode pad so as to form an embedded capacitor.

REFERENCES:
patent: 5814366 (1998-09-01), Fukuta et al.
patent: 6021050 (2000-02-01), Ehman et al.
patent: 6258649 (2001-07-01), Nakamura et al.
patent: 6642563 (2003-11-01), Kanaya
patent: 2003/0102153 (2003-06-01), Sugaya et al.
patent: 440993 (2001-06-01), None

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