Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2005-10-25
2005-10-25
Zarneke, David A. (Department: 2829)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S257000
Reexamination Certificate
active
06958265
ABSTRACT:
A process of forming a device with nanoclusters. The process includes forming nanoclusters (e.g. silicon nanocrystals) and forming an oxidation barrier layer over the nanoclusters to inhibit oxidizing agents from oxidizing the nanoclusters during a subsequent formation of a dielectric of the device. At least a portion of the oxidation barrier layer is removed after the formation of the dielectric. In one example, the device is a memory wherein the nanoclusters are utilized as charge storage locations for charge storage transistors of the memory. In this example, the oxidation barrier layer protects the nanoclusters from oxidizing agents due to the formation of gate dielectric for high voltage transistors of the memory.
REFERENCES:
patent: 6297095 (2001-10-01), Muralidhar et al.
patent: 6320784 (2001-11-01), Muralidhar et al.
patent: 6444545 (2002-09-01), Sadd et al.
Cavins et al., “A Nitride-Oxide Blocking Layer for Scaled SONOS Non-Volatile Memory,”Motorola, Inc.,Jan. 10, 2002, 5 pages.
Cavins et al., “Integrated Stacked Gate Oxide and Interpoly Oxide,”Motorola, Inc.,,Nov. 1996, pp. 93-94.
Muralidhar Ramachandran
Paulson Wayne M.
Prinz Erwin J.
Rao Rajesh A.
Steimle Robert F.
Balconi-Lamica Michael
Dolezal David G.
Freescale Semiconductor Inc.
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