Semiconductor memory device having hierarchical structure of...

Details Semiconductor memory device having hierarchical structure of... Semiconductor memory device having hierarchical structure of...

2005-08-16

2005-08-16

Mai, Son (Department: 2827)

Static information storage and retrieval

Read/write circuit

Precharge

C365S190000, C365S205000

Reexamination Certificate

active

06930939

ABSTRACT:
A semiconductor memory device having a hierarchical structure of data input/output lines and a precharge method thereof. A precharge method in a semiconductor memory device having a hierarchical structure includes precharging the global input/output line pairs with half of a memory cell array voltage, and precharging the local input/output line pairs with the half of the memory cell array voltage.

REFERENCES:
patent: 4962324 (1990-10-01), Park
patent: 5642314 (1997-06-01), Yamauchi
patent: 5650980 (1997-07-01), Sakurai et al.
patent: 5946252 (1999-08-01), Arimoto
patent: 6771550 (2004-08-01), Park

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