Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2005-10-04
2005-10-04
Le, Thao P. (Department: 2818)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C257S296000, C257S298000
Reexamination Certificate
active
06951789
ABSTRACT:
A memory structure has a vertically oriented access transistor with an annular gate region. A transistor is fabricated such that the channel of the transistor extends outward with respect to the surface of the substrate. An annular gate is fabricated around the vertical channel such that it partially or completely surrounds the channel. A buried annular bitline may also be implemented. After the vertically oriented transistor is fabricated with the annular gate, a storage device may be fabricated over the transistor to provide a memory cell.
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Bissey Lucien J.
Duesman Kevin G.
Voshell Thomas W.
Le Thao P.
Micro)n Technology, Inc.
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