Stacked device underfill and a method of fabrication

Details Stacked device underfill and a method of fabrication Stacked device underfill and a method of fabrication

2005-09-20

2005-09-20

Brewster, William M. (Department: 2823)

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

C438S626000, C438S633000, C438S691000

Reexamination Certificate

active

06946384

ABSTRACT:
Numerous embodiments of a stacked device underfill and a method of formation are disclosed. In one embodiment, a method of forming stacked semiconductor device with an underfill comprises forming one or more layers of compliant material on at least a portion of the top surface of a substrate, said substrate, curing at least a portion of the semiconductor device, selectively removing a portion of the one or more layer of complaint material, and assembling the substrate into a stacked semiconductor device.

REFERENCES:
patent: 5846853 (1998-12-01), Otsuki et al.
patent: 6319837 (2001-11-01), Chittipeddi et al.
patent: 6555477 (2003-04-01), Lu et al.
Stanley Wolf Ph.D. and Richard N. Tauber Ph.D. in Silicon Processing for the VLSI Era, vol. 1: Process Technology, Lattice Press, 1986, pp. 539-542.
Stanley Wolf Ph.D. and Richard N. Tauber Ph.D. in Silicon Processing for the VLSI Era, vol. 1: Process Technology, Lattice Press, 1986, pp. 430-441, 518-9.

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