Monotonic dynamic static pseudo-NMOS logic circuits

Details Monotonic dynamic static pseudo-NMOS logic circuits Monotonic dynamic static pseudo-NMOS logic circuits

2005-01-04

2005-01-04

Cho, James H. (Department: 2819)

Electronic digital logic circuitry

Clocking or synchronizing of logic stages or gates

Field-effect transistor

C326S096000

Reexamination Certificate

active

06838911

ABSTRACT:
A method and apparatus for evaluating logical inputs electronically using electronic logic circuits in monotonic dynamic-static pseudo-NMOS configurations. The apparatus includes alternating dynamic and static circuit portions adapted to transition monotonically in response to a common clock (or complemented clock) signal. The circuit portions include pseudo-NMOS configured switching circuits implementing logical functions.

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