Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate
2005-04-12
2005-04-12
Portka, Gary (Department: 2188)
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
C711S118000
Reexamination Certificate
active
06880047
ABSTRACT:
In a processor module having a local software visible data memory and a write through cache connected to an external memory space external to the processor module over a bus, a method and apparatus for supplementing the local software visible data memory utilizing the write through cache is disclosed which may comprise: a processor bus interface and memory management unit adapted to detect a processor write operation to a preselected location in the external memory space that is not currently a cached address line, that will cause a cache miss, to decode the write operation to the preselected external memory space location as a RAM emulation write operation and to place in the cache pseudo data at the respective address line in the cache, without executing a fetch and store from the actual external memory location in response to the cache miss. The method and apparatus may further comprise the processor bus interface and memory management unit further adapted to subsequently ignore the write through command from the processor when the processor writes to the address without a cache miss. The external memory space may include a cacheable portion of external memory space and a non-cacheable portion of the external memory space; and, the preselected external memory space may be located within the cacheable portion of the external memory space. The module may be implemented on an integrated circuit and comprise a portion of a computer and communication link interface and may include a plurality of modules and may be contained on a host bus adapter card.
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Emulex Design & Manufacturing Corporation
Morrison & Foerster / LLP
Portka Gary
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