Suppressing the leakage current in an integrated circuit

Details Suppressing the leakage current in an integrated circuit Suppressing the leakage current in an integrated circuit

2005-03-08

2005-03-08

Cho, James H. (Department: 2819)

Electronic digital logic circuitry

Signal sensitivity or transmission integrity

Signal level or switching threshold stabilization

C326S034000, C327S544000

Reexamination Certificate

active

06864708

ABSTRACT:
A semiconductor integrated circuit wherein the circuit area can be minimized, and defects can be detected reliably during a standby status while maintaining the reliability of a gate oxide film. Switching circuit20is provided between logic circuit10and source voltage Vddsupply terminal. While in an operating status, 0 V voltage is applied to the gate of transistor MP0of switching circuit20,and bias voltage VBequal to or slightly lower than source voltage Vddis applied to its channel region in order to reduce the threshold voltage of transistor MP0and increase its current driving capability. While in a standby status, a voltage equal to source voltage Vddis applied to the gate of transistor MP0, a voltage lower than the source voltage is applied to the source, and bulk bias voltage VBequal to or higher than source voltage Vddis applied to the channel region in order to minimize the drain current of transistor MP0, so that current path of logic circuit10is cut off, and the occurrence of leakage current is suppressed.

REFERENCES:
patent: 5408144 (1995-04-01), Sakata et al.
patent: 5973552 (1999-10-01), Allan
patent: 6483165 (2002-11-01), Ooishi et al.
patent: 09-073873 (1997-03-01), None
patent: 10-270993 (1998-10-01), None

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