Electronic digital logic circuitry – With test facilitating feature
Reexamination Certificate
2005-05-17
2005-05-17
Tran, Anh Q. (Department: 2819)
Electronic digital logic circuitry
With test facilitating feature
C326S095000, C326S098000
Reexamination Certificate
active
06894528
ABSTRACT:
An invention is disclosed for a process monitor based keeper scheme for dynamic circuits. A semiconductor die having a process monitor based keeper scheme of the embodiments of the present invention generally includes a plurality of dynamic circuits, each having an adaptive keeper circuit capable of being adjusted based on a bit code. In addition, a plurality of process monitors is included. Each process monitor is disposed within a corresponding die block, which defines a local area of the die. The process monitors are capable of detecting process corner data for the corresponding die block. In communication with each process monitor and the plurality of dynamic circuits is a test processor unit. The test processor unit obtains process corner data for each die block from the process monitor disposed within the die block, and provides a bit code based on the process corner data to the dynamic circuits disposed within the die block.
REFERENCES:
patent: 6002292 (1999-12-01), Allen et al.
patent: 6690604 (2004-02-01), Hsu et al.
Desai Shaishav A.
Gauthier Claude R.
Martine & Penilla & Gencarella LLP
Sun Microsystems Inc.
Tran Anh Q.
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