Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2005-05-03
2005-05-03
Guerrero, Maria F. (Department: 2822)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S197000, C438S211000, C438S258000, C438S262000, C438S263000, C438S264000, C438S593000
Reexamination Certificate
active
06887757
ABSTRACT:
A method of fabricating a flash memory device is provided. First, a substrate partitioned into a memory cell region and a peripheral circuit region is provided. A tunnel dielectric layer is formed over the memory cell region and a liner layer is formed over the peripheral circuit region. Thereafter, a patterned gate conductive layer is formed over the substrate. An inter-gate dielectric layer and a passivation layer are sequentially formed over the substrate. The passivation layer, the inter-gate dielectric layer, the gate conductive layer and the liner layer over the peripheral circuit region are removed. A gate dielectric layer is formed over the peripheral circuit region while the passivation layer over the memory cell region is converted into an oxide layer. Another conductive layer is formed over the substrate. The conductive layer, the oxide layer, the inter-gate dielectric layer and the gate conductive layer over the memory cell region are patterned to form a memory gate. The second conductive layer over the peripheral circuit region is similarly patterned to form a gate.
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Chen Kuang-Chao
Shih Hsueh-Hao
Yang Ling-Wuu
Guerrero Maria F.
Jiang Chyun IP office
MACRONIX International Co. Ltd.
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