Method of manufacturing a dual gate semiconductor device...

Details Method of manufacturing a dual gate semiconductor device... Method of manufacturing a dual gate semiconductor device...

2005-04-19

2005-04-19

Chen, Jack (Department: 2813)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S216000, C438S223000, C438S229000, C438S231000

Reexamination Certificate

active

06881618

ABSTRACT:
In order to realize a dual gate CMOS semiconductor device with little leakage of boron that makes it possible to divisionally doping a p-type impurity and an n-type impurity into a polycrystalline silicon layer with one mask, a gate electrode has a high melting point metal/metallic nitride barrier/polycrystalline silicon structure. The boron is pre-doped in the polycrystalline silicon layer. The phosphorus or arsenic is doped in an n-channel area. Then, the annealing in a hydrogen atmosphere with vapor added therein is performed. As a result, the boron is segregated on the interface of the metallic nitride film and the phosphorus is segregated on the interface of the gate oxide film, for forming an n+ gate.

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IEEE Electron Device Let., vol. 17, No. 11, Nov. 1996, pp. 497-499.

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