Semiconductor memory device with structure providing...

Details Semiconductor memory device with structure providing... Semiconductor memory device with structure providing...

2005-04-12

2005-04-12

Lebentritt, Michael S. (Department: 2824)

Static information storage and retrieval

Read/write circuit

Signals

C365S230030, C365S189020

Reexamination Certificate

active

06879527

ABSTRACT:
A semiconductor memory device includes a plurality of memory array blocks including predetermined numbers of memory cells, the memory array blocks being arranged in the row direction; a RAS chain being aligned at a side of the plurality of memory array blocks in the row direction, the RAS chain for selecting and activating a particular word line; a CAS chain being aligned at the other side of the plurality of memory array blocks in the column direction, the CAS chain for amplifying N bits of data from the plurality of memory array blocks and outputting the result to an input/output (IO) line, wherein N is a natural number more than 2; and a data converter for continuously outputting the N bits of data input via the IO line from a memory array block nearest to the RAS chain to a memory array block farthest from the RAS chain.

REFERENCES:
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patent: 5367495 (1994-11-01), Ishikawa
patent: 5485424 (1996-01-01), Kawamura
patent: 5950223 (1999-09-01), Chiang et al.
patent: 5959936 (1999-09-01), Seo et al.
patent: 20020060938 (2002-05-01), Song et al.
patent: 20030103394 (2003-06-01), Koshikawa

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