Semiconductor device with trench isolation between two...

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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C257S314000, C257S288000

Reexamination Certificate

active

06844590

ABSTRACT:
The major surface of a semiconductor substrate of a semiconductor device includes first and second regions and a boundary area therebetween. A first gate insulating film and a first gate electrode are formed in the first region. A second gate insulating film different from the first gate insulating film and a second gate electrode are formed in the second region. A device isolation region is formed in the boundary area. This device isolation region includes a trench formed in the major surface, and an insulating layer having a portion buried in the trench and a portion projecting upward from the major surface. The bottom of the trench has depths different with portions.

REFERENCES:
patent: 6020229 (2000-02-01), Yamane et al.
patent: 6411548 (2002-06-01), Sakui et al.
patent: 8-330436 (1996-12-01), None
patent: 10-163337 (1998-06-01), None
patent: 2001-15505 (2001-01-01), None
patent: 2001-203285 (2001-07-01), None
U.S. patent application Ser. No. 10/058,946, Gode et al., filed Jan. 30, 2002.
Y. Takeuchi, et al., “A Self-Aligned STI Process Integration for Low Cost and Highly Reliable 1Gbit Flash Memories”, VLSI Technology Digest of Technical Papers, 1998, pp. 102-103.

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